BYPASS_CLK_SRC=REF_CLK_24M
Analog ENET PLL Control Register
| POWERDOWN | Powers down the PLL. |
| BYPASS_CLK_SRC | Determines the bypass source. 0 (REF_CLK_24M): Select the 24MHz oscillator as source. |
| BYPASS | Bypass the PLL. |
| ENET_500M_REF_EN | Enable the PLL providing ENET 500 MHz reference clock |
| LOCK | 1 - PLL is currently locked; 0 - PLL is not currently locked. |